[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isss/ZivojnovicPSWSM96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/C._Sch%E2%88%9A%C2%A7lger>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Heinrich_Meyr>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Markus_Willems>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rainer_Schoenen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stefan_Pees>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vojin_Zivojnovic>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISSS.1996.565890>
foaf:homepage <https://doi.org/10.1109/ISSS.1996.565890>
dc:identifier DBLP conf/isss/ZivojnovicPSWSM96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISSS.1996.565890 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label DSP Processor/Compiler Co-Design: A Quantitative Approach. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/C._Sch%E2%88%9A%C2%A7lger>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Heinrich_Meyr>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Markus_Willems>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rainer_Schoenen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stefan_Pees>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vojin_Zivojnovic>
swrc:pages 108- (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isss/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isss/ZivojnovicPSWSM96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isss/ZivojnovicPSWSM96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isss/isss1996.html#ZivojnovicPSWSM96>
rdfs:seeAlso <https://doi.org/10.1109/ISSS.1996.565890>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isss>
dc:subject digital signal processing chips; digital signal processing; embedded systems; processor/compiler codesign; top-down approach; performance evaluation; benchmarking methodology; DSPstone; fast processor simulation; SuperSim; machine description; LISA; compiled processor simulation (xsd:string)
dc:title DSP Processor/Compiler Co-Design: A Quantitative Approach. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document