Modular verification of code with SAT.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/issta/DennisCJ06
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/issta/DennisCJ06
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Daniel_Jackson_0001
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Felix_Sheng-Ho_Chang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Greg_Dennis
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F1146238.1146251
>
foaf:
homepage
<
https://doi.org/10.1145/1146238.1146251
>
dc:
identifier
DBLP conf/issta/DennisCJ06
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F1146238.1146251
(xsd:string)
dcterms:
issued
2006
(xsd:gYear)
rdfs:
label
Modular verification of code with SAT.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Daniel_Jackson_0001
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Felix_Sheng-Ho_Chang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Greg_Dennis
>
swrc:
pages
109-120
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/issta/2006
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/issta/DennisCJ06/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/issta/DennisCJ06
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/issta/issta2006.html#DennisCJ06
>
rdfs:
seeAlso
<
https://doi.org/10.1145/1146238.1146251
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/issta
>
dc:
subject
SAT, alloy, first-order logic, formal methods, formal verification, software model checking
(xsd:string)
dc:
title
Modular verification of code with SAT.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document