A Low-Leakage, Robust ESD Clamp with Thyristor Delay Element in 65 nm CMOS Technology. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:title	A Low-Leakage, Robust ESD Clamp with Thyristor Delay Element in 65 nm CMOS Technology. (xsd:string)
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