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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isvlsi/HentschkeFPR07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Felipe_Pinto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guilherme_Flach>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Renato_Fernandes_Hentschke>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ricardo_Reis_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISVLSI.2007.1>
foaf:homepage <https://doi.org/10.1109/ISVLSI.2007.1>
dc:identifier DBLP conf/isvlsi/HentschkeFPR07 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISVLSI.2007.1 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label 3D-Vias Aware Quadratic Placement for 3D VLSI Circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Felipe_Pinto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guilherme_Flach>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Renato_Fernandes_Hentschke>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ricardo_Reis_0001>
swrc:pages 67-72 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isvlsi/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isvlsi/HentschkeFPR07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isvlsi/HentschkeFPR07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2007.html#HentschkeFPR07>
rdfs:seeAlso <https://doi.org/10.1109/ISVLSI.2007.1>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isvlsi>
dc:title 3D-Vias Aware Quadratic Placement for 3D VLSI Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document