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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isvlsi/HuangD02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lan-Rong_Dung>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shiuh-Rong_Huang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISVLSI.2002.1016882>
foaf:homepage <https://doi.org/10.1109/ISVLSI.2002.1016882>
dc:identifier DBLP conf/isvlsi/HuangD02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISVLSI.2002.1016882 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label VLSI Implementation for MAC-Level DWT Architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lan-Rong_Dung>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shiuh-Rong_Huang>
swrc:pages 101-106 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isvlsi/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isvlsi/HuangD02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isvlsi/HuangD02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2002.html#HuangD02>
rdfs:seeAlso <https://doi.org/10.1109/ISVLSI.2002.1016882>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isvlsi>
dc:subject VLSI, DWT, FSFG, limited-resource (LR), MAC-level, scheduling (xsd:string)
dc:title VLSI Implementation for MAC-Level DWT Architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document