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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isvlsi/LiFTM05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alex_Fit-Florea>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_W._Matula>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lun_Li>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mitchell_A._Thornton>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISVLSI.2005.35>
foaf:homepage <https://doi.org/10.1109/ISVLSI.2005.35>
dc:identifier DBLP conf/isvlsi/LiFTM05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISVLSI.2005.35 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2k. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alex_Fit-Florea>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_W._Matula>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lun_Li>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mitchell_A._Thornton>
swrc:pages 130-135 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isvlsi/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isvlsi/LiFTM05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isvlsi/LiFTM05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2005.html#LiFTM05>
rdfs:seeAlso <https://doi.org/10.1109/ISVLSI.2005.35>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isvlsi>
dc:title Hardware Implementation of an Additive Bit-Serial Algorithm for the Discrete Logarithm Modulo 2k. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document