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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isvlsi/MolinaRMH04>
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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rafael_Ruiz-Sautua>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rom%E2%88%9A%C2%B0n_Hermida>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISVLSI.2004.1339515>
foaf:homepage <https://doi.org/10.1109/ISVLSI.2004.1339515>
dc:identifier DBLP conf/isvlsi/MolinaRMH04 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISVLSI.2004.1339515 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Behavioural Scheduling to Balance the Bit-Level Computational Effort. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_M._Mend%E2%88%9A%E2%89%A0as>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mar%E2%88%9A%E2%89%A0a_C._Molina>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rafael_Ruiz-Sautua>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rom%E2%88%9A%C2%B0n_Hermida>
swrc:pages 99-104 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isvlsi/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isvlsi/MolinaRMH04/dblp>
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rdfs:seeAlso <https://doi.org/10.1109/ISVLSI.2004.1339515>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isvlsi>
dc:title Behavioural Scheduling to Balance the Bit-Level Computational Effort. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document