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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/isvlsi/ZuccalaDRM23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Damiano_Zuccal%E2%88%9A%E2%80%A0>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jean-Marc_Daveau>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Katell_Morin-Allory>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Philippe_Roche>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FISVLSI59464.2023.10238514>
foaf:homepage <https://doi.org/10.1109/ISVLSI59464.2023.10238514>
dc:identifier DBLP conf/isvlsi/ZuccalaDRM23 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FISVLSI59464.2023.10238514 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Formal Temporal Characterization of Register Vulnerability in Digital Circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Damiano_Zuccal%E2%88%9A%E2%80%A0>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jean-Marc_Daveau>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Katell_Morin-Allory>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Philippe_Roche>
swrc:pages 1-6 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/isvlsi/2023>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/isvlsi/ZuccalaDRM23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/isvlsi/ZuccalaDRM23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/isvlsi/isvlsi2023.html#ZuccalaDRM23>
rdfs:seeAlso <https://doi.org/10.1109/ISVLSI59464.2023.10238514>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/isvlsi>
dc:title Formal Temporal Characterization of Register Vulnerability in Digital Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document