A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/itc/LiYHWTHC03
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A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy.
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built-in self-test, built-in self-repair, built-in redundancy-analysis, memory testing, semiconductor memory
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A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy.
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