Interconnect Delay Testing of Designs on Programmable Logic Devices. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Mehdi_Baradaran_Tahoori>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Subhasish_Mitra>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1109%2FTEST.2004.1387001>
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dcterms:issued	2004 (xsd:gYear)
rdfs:label	Interconnect Delay Testing of Designs on Programmable Logic Devices. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Mehdi_Baradaran_Tahoori>
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dc:title	Interconnect Delay Testing of Designs on Programmable Logic Devices. (xsd:string)
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