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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/itc/WuLRJST04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anil_Sabbavarapu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_M._Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Larry_Thatcher>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Madhukar_Reddy>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mike_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Talal_Jaber>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTEST.2004.1386935>
foaf:homepage <https://doi.org/10.1109/TEST.2004.1386935>
dc:identifier DBLP conf/itc/WuLRJST04 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTEST.2004.1386935 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label An Optimized DFT and Test Pattern Generation Strategy for an Intel High Performance Microprocessor. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anil_Sabbavarapu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_M._Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Larry_Thatcher>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Madhukar_Reddy>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mike_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Talal_Jaber>
swrc:pages 38-47 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/itc/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/itc/WuLRJST04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/itc/WuLRJST04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/itc/itc2004.html#WuLRJST04>
rdfs:seeAlso <https://doi.org/10.1109/TEST.2004.1386935>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/itc>
dc:title An Optimized DFT and Test Pattern Generation Strategy for an Intel High Performance Microprocessor. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document