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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/iwann/IzeboudjenFTB99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ahcene_Farah>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/H._Boumeridja>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nouma_Izeboudjen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/S._Titri>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2FBFb0100480>
foaf:homepage <https://doi.org/10.1007/BFb0100480>
dc:identifier DBLP conf/iwann/IzeboudjenFTB99 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2FBFb0100480 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label Digital Implementation of Artificial Neural Networks: From VHDL Description to EPGA Implementation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ahcene_Farah>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/H._Boumeridja>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nouma_Izeboudjen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/S._Titri>
swrc:pages 139-148 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/iwann/1999-2>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/iwann/IzeboudjenFTB99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/iwann/IzeboudjenFTB99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/iwann/iwann1999-2.html#IzeboudjenFTB99>
rdfs:seeAlso <https://doi.org/10.1007/BFb0100480>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/iwann>
dc:subject ANN; top down design; VHDL; parametric description; FPGA implementation (xsd:string)
dc:title Digital Implementation of Artificial Neural Networks: From VHDL Description to EPGA Implementation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document