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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/lcn/AsciaFP95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daniela_Panno>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Ascia>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Ficili>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FLCN.1995.527330>
foaf:homepage <https://doi.org/10.1109/LCN.1995.527330>
dc:identifier DBLP conf/lcn/AsciaFP95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FLCN.1995.527330 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Design of a VLSI fuzzy processor for ATM traffic sources management. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daniela_Panno>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Ascia>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Ficili>
swrc:pages 62-71 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/lcn/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/lcn/AsciaFP95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/lcn/AsciaFP95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/lcn/lcn1995.html#AsciaFP95>
rdfs:seeAlso <https://doi.org/10.1109/LCN.1995.527330>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/lcn>
dc:subject asynchronous transfer mode; telecommunication congestion control; fuzzy logic; inference mechanisms; ATM networks; VLSI fuzzy processor; ATM traffic sources management; bottleneck; traffic arrival; traffic control; policing; policing mechanism; Fuzzy Logic; fuzzy inferences (xsd:string)
dc:title Design of a VLSI fuzzy processor for ATM traffic sources management. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document