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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/lcpc/Chu07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Slo-Li_Chu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-85261-2%5F18>
foaf:homepage <https://doi.org/10.1007/978-3-540-85261-2_18>
dc:identifier DBLP conf/lcpc/Chu07 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-85261-2%5F18 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label Critical Block Scheduling: A Thread-Level Parallelizing Mechanism for a Heterogeneous Chip Multiprocessor Architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Slo-Li_Chu>
swrc:pages 261-275 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/lcpc/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/lcpc/Chu07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/lcpc/Chu07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/lcpc/lcpc2007.html#Chu07>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-85261-2_18>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/lcpc>
dc:subject Chip Multiprocessor (CMP); Processor-in-Memory; Critical Block Scheduling; Octans (xsd:string)
dc:title Critical Block Scheduling: A Thread-Level Parallelizing Mechanism for a Heterogeneous Chip Multiprocessor Architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document