Compiler-managed partitioned data caches for low power.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/lctrts/RavindranCM07
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2007
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Compiler-managed partitioned data caches for low power.
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embedded processor, hardware/software co-managed cache, instruction-driven cache management, low-power, partitioned cache
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Compiler-managed partitioned data caches for low power.
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