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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/lctrts/YanSG06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Leipo_Yan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Niu_Gang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Thambipillai_Srikanthan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1134650.1134677>
foaf:homepage <https://doi.org/10.1145/1134650.1134677>
dc:identifier DBLP conf/lctrts/YanSG06 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1134650.1134677 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leipo_Yan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Niu_Gang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Thambipillai_Srikanthan>
swrc:pages 182-188 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/lctrts/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/lctrts/YanSG06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/lctrts/YanSG06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/lctrts/lctes2006.html#YanSG06>
rdfs:seeAlso <https://doi.org/10.1145/1134650.1134677>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/lctrts>
dc:subject CGRA, VLIW, area estimation, delay estimation, hardware/software partitioning (xsd:string)
dc:title Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document