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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/memsys/SteinerS0SW22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chirag_Sudarshan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dominik_Stoffel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lukas_Steiner>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Matthias_Jung_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Norbert_Wehn>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3565053.3565059>
foaf:homepage <https://doi.org/10.1145/3565053.3565059>
dc:identifier DBLP conf/memsys/SteinerS0SW22 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3565053.3565059 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label A Framework for Formal Verification of DRAM Controllers. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chirag_Sudarshan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dominik_Stoffel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lukas_Steiner>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Matthias_Jung_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Norbert_Wehn>
swrc:pages 6:1-6:7 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/memsys/2022>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/memsys/SteinerS0SW22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/memsys/SteinerS0SW22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/memsys/memsys2022.html#SteinerS0SW22>
rdfs:seeAlso <https://doi.org/10.1145/3565053.3565059>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/memsys>
dc:title A Framework for Formal Verification of DRAM Controllers. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document