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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/micro/HackenbergMN09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daniel_Hackenberg>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daniel_Molka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wolfgang_E._Nagel>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1669112.1669165>
foaf:homepage <https://doi.org/10.1145/1669112.1669165>
dc:identifier DBLP conf/micro/HackenbergMN09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1669112.1669165 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daniel_Hackenberg>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daniel_Molka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wolfgang_E._Nagel>
swrc:pages 413-422 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/micro/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/micro/HackenbergMN09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/micro/HackenbergMN09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/micro/micro2009.html#HackenbergMN09>
rdfs:seeAlso <https://doi.org/10.1145/1669112.1669165>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/micro>
dc:subject Nehalem, Shanghai, benchmark, coherency, multi-core (xsd:string)
dc:title Comparing cache architectures and coherency protocols on x86-64 multicore SMP systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document