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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/micro/HuangD93>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alvin_M._Despain>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ing-Jer_Huang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMICRO.1993.282759>
foaf:homepage <https://doi.org/10.1109/MICRO.1993.282759>
dc:identifier DBLP conf/micro/HuangD93 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMICRO.1993.282759 (xsd:string)
dcterms:issued 1993 (xsd:gYear)
rdfs:label An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alvin_M._Despain>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ing-Jer_Huang>
swrc:pages 236-246 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/micro/1993>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/micro/HuangD93/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/micro/HuangD93>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/micro/micro1993.html#HuangD93>
rdfs:seeAlso <https://doi.org/10.1109/MICRO.1993.282759>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/micro>
dc:subject compiler back-end generation, hardware/software tradeoffs, high level synthesis, inter-instruction dependency, pipeline hazard resolution (xsd:string)
dc:title An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document