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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/micro/YuanBA09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ali_Bakhoda>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/George_L._Yuan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tor_M._Aamodt>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1669112.1669119>
foaf:homepage <https://doi.org/10.1145/1669112.1669119>
dc:identifier DBLP conf/micro/YuanBA09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1669112.1669119 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Complexity effective memory access scheduling for many-core accelerator architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ali_Bakhoda>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_L._Yuan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tor_M._Aamodt>
swrc:pages 34-44 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/micro/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/micro/YuanBA09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/micro/YuanBA09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/micro/micro2009.html#YuanBA09>
rdfs:seeAlso <https://doi.org/10.1145/1669112.1669119>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/micro>
dc:subject graphics processors, memory controller, on-chip interconnection networks (xsd:string)
dc:title Complexity effective memory access scheduling for many-core accelerator architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document