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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/mss/XiaoC0LL19>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chunhua_Xiao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Duo_Liu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lei_Zhang_0072>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Linfeng_Cheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Weichen_Liu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMSST.2019.000-7>
foaf:homepage <https://doi.org/10.1109/MSST.2019.000-7>
dc:identifier DBLP conf/mss/XiaoC0LL19 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMSST.2019.000-7 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label Wear-aware Memory Management Scheme for Balancing Lifetime and Performance of Multiple NVM Slots. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chunhua_Xiao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Duo_Liu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lei_Zhang_0072>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Linfeng_Cheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Weichen_Liu>
swrc:pages 148-160 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/mss/2019>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/mss/XiaoC0LL19/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/mss/XiaoC0LL19>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/mss/msst2019.html#XiaoC0LL19>
rdfs:seeAlso <https://doi.org/10.1109/MSST.2019.000-7>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/mss>
dc:title Wear-aware Memory Management Scheme for Balancing Lifetime and Performance of Multiple NVM Slots. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document