A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/mtdt/HuangLYW02
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A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories.
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embedded memory, memory testing, memory repair, redundancy analysis, simulation
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A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories.
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