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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/mtv/MostafaSED14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/M._Watheq_El-Kharashi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Moaz_Mostafa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohamed_Dessouky>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mona_Safar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMTV.2014.23>
foaf:homepage <https://doi.org/10.1109/MTV.2014.23>
dc:identifier DBLP conf/mtv/MostafaSED14 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMTV.2014.23 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
rdfs:label System Verilog Assertion Debugging Based on Visualization, Simulation Results, and Mutation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._Watheq_El-Kharashi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Moaz_Mostafa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohamed_Dessouky>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mona_Safar>
swrc:pages 55-60 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/mtv/2014>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/mtv/MostafaSED14/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/mtv/MostafaSED14>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/mtv/mtv2014.html#MostafaSED14>
rdfs:seeAlso <https://doi.org/10.1109/MTV.2014.23>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/mtv>
dc:title System Verilog Assertion Debugging Based on Visualization, Simulation Results, and Mutation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document