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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/mtv/RoyJJP15>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nikhil_Jain>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Robert_Page>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sandeep_Jain>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sourav_Roy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMTV.2015.17>
foaf:homepage <https://doi.org/10.1109/MTV.2015.17>
dc:identifier DBLP conf/mtv/RoyJJP15 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMTV.2015.17 (xsd:string)
dcterms:issued 2015 (xsd:gYear)
rdfs:label Leveraging Virtual Prototype Models for Hardware Verification of an Accelerated Network Packet Processing Engine. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nikhil_Jain>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Robert_Page>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sandeep_Jain>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sourav_Roy>
swrc:pages 15-19 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/mtv/2015>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/mtv/RoyJJP15/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/mtv/RoyJJP15>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/mtv/mtv2015.html#RoyJJP15>
rdfs:seeAlso <https://doi.org/10.1109/MTV.2015.17>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/mtv>
dc:title Leveraging Virtual Prototype Models for Hardware Verification of an Accelerated Network Packet Processing Engine. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document