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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/mwscas/GalAR12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/George_Gal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gordon_W._Roberts>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Omar_Abdelfattah>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMWSCAS.2012.6291956>
foaf:homepage <https://doi.org/10.1109/MWSCAS.2012.6291956>
dc:identifier DBLP conf/mwscas/GalAR12 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMWSCAS.2012.6291956 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
rdfs:label A 30-40 GHz fractional-N frequency synthesizer development using a Verilog-A high-level design methodology. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_Gal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gordon_W._Roberts>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Omar_Abdelfattah>
swrc:pages 57-60 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/mwscas/2012>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/mwscas/GalAR12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/mwscas/GalAR12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/mwscas/mwscas2012.html#GalAR12>
rdfs:seeAlso <https://doi.org/10.1109/MWSCAS.2012.6291956>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/mwscas>
dc:title A 30-40 GHz fractional-N frequency synthesizer development using a Verilog-A high-level design methodology. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document