[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/mwscas/SakibSS17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ashiq_A._Sakib>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Scott_C._Smith>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sudarshan_K._Srinivasan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMWSCAS.2017.8052974>
foaf:homepage <https://doi.org/10.1109/MWSCAS.2017.8052974>
dc:identifier DBLP conf/mwscas/SakibSS17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMWSCAS.2017.8052974 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label Formal modeling and verification for pre-charge half buffer gates and circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ashiq_A._Sakib>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Scott_C._Smith>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sudarshan_K._Srinivasan>
swrc:pages 519-522 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/mwscas/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/mwscas/SakibSS17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/mwscas/SakibSS17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/mwscas/mwscas2017.html#SakibSS17>
rdfs:seeAlso <https://doi.org/10.1109/MWSCAS.2017.8052974>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/mwscas>
dc:title Formal modeling and verification for pre-charge half buffer gates and circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document