Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/mwscas/YangKB17
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Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing.
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Interleaved logic-in-memory architecture for energy-efficient fine-grained data processing.
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