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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/nanoarch/SharmaMB17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrew_Marshall>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jonathan_Bird>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nishtha_Sharma>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FNANOARCH.2017.8053716>
foaf:homepage <https://doi.org/10.1109/NANOARCH.2017.8053716>
dc:identifier DBLP conf/nanoarch/SharmaMB17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FNANOARCH.2017.8053716 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
rdfs:label Verilog - A compact model of a ME-MTJ based XNOR/NOR gate. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrew_Marshall>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jonathan_Bird>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nishtha_Sharma>
swrc:pages 162-167 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/nanoarch/2017>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/nanoarch/SharmaMB17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/nanoarch/SharmaMB17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/nanoarch/nanoarch2017.html#SharmaMB17>
rdfs:seeAlso <https://doi.org/10.1109/NANOARCH.2017.8053716>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/nanoarch>
dc:title Verilog - A compact model of a ME-MTJ based XNOR/NOR gate. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document