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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/nanonet/FuA08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bo_Fu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Paul_Ampadu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-642-02427-6%5F15>
foaf:homepage <https://doi.org/10.1007/978-3-642-02427-6_15>
dc:identifier DBLP conf/nanonet/FuA08 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-642-02427-6%5F15 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label A Dual-Mode Hybrid ARQ Scheme for Energy Efficient On-Chip Interconnects. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bo_Fu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Paul_Ampadu>
swrc:pages 74-79 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/nanonet/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/nanonet/FuA08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/nanonet/FuA08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/nanonet/nanonet2008.html#FuA08>
rdfs:seeAlso <https://doi.org/10.1007/978-3-642-02427-6_15>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/nanonet>
dc:subject Adaptive error control; on-chip interconnects; hybrid ARQ; interleaving (xsd:string)
dc:title A Dual-Mode Hybrid ARQ Scheme for Energy Efficient On-Chip Interconnects. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document