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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/newcas/IizukaS13>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Saito>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Minoru_Iizuka>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FNEWCAS.2013.6573596>
foaf:homepage <https://doi.org/10.1109/NEWCAS.2013.6573596>
dc:identifier DBLP conf/newcas/IizukaS13 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FNEWCAS.2013.6573596 (xsd:string)
dcterms:issued 2013 (xsd:gYear)
rdfs:label A floorplan method for ASIC designs of asynchronous circuits with bundled-data implementation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Saito>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Minoru_Iizuka>
swrc:pages 1-4 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/newcas/2013>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/newcas/IizukaS13/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/newcas/IizukaS13>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/newcas/newcas2013.html#IizukaS13>
rdfs:seeAlso <https://doi.org/10.1109/NEWCAS.2013.6573596>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/newcas>
dc:title A floorplan method for ASIC designs of asynchronous circuits with bundled-data implementation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document