Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/newcas/MoussaviSSKKILPM23
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/newcas/MoussaviSSKKILPM23
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Animesh_Singh
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Aravind_Padma_Kumar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Daniyar_Kizatov
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Dominik_Sisejkovic
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Elmira_Moussavi
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Farhad_Merchant
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Rainer_Leupers
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sven_Ingebrandt
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Vivek_Pachauri
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FNEWCAS57931.2023.10198032
>
foaf:
homepage
<
https://doi.org/10.1109/NEWCAS57931.2023.10198032
>
dc:
identifier
DBLP conf/newcas/MoussaviSSKKILPM23
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FNEWCAS57931.2023.10198032
(xsd:string)
dcterms:
issued
2023
(xsd:gYear)
rdfs:
label
Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Animesh_Singh
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Aravind_Padma_Kumar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Daniyar_Kizatov
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Dominik_Sisejkovic
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Elmira_Moussavi
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Farhad_Merchant
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Rainer_Leupers
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Sven_Ingebrandt
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Vivek_Pachauri
>
swrc:
pages
1-5
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/newcas/2023
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/newcas/MoussaviSSKKILPM23/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/newcas/MoussaviSSKKILPM23
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/newcas/newcas2023.html#MoussaviSSKKILPM23
>
rdfs:
seeAlso
<
https://doi.org/10.1109/NEWCAS57931.2023.10198032
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/newcas
>
dc:
title
Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document