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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/newcas/NarayananDZT12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alaeddine_Daghar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohamed_H._Zaki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajeev_Narayanan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sofi%E2%88%9A%C2%AEne_Tahar>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FNEWCAS.2012.6328987>
foaf:homepage <https://doi.org/10.1109/NEWCAS.2012.6328987>
dc:identifier DBLP conf/newcas/NarayananDZT12 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FNEWCAS.2012.6328987 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
rdfs:label Using LCSS algorithm for circuit level verification of analog designs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alaeddine_Daghar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohamed_H._Zaki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajeev_Narayanan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sofi%E2%88%9A%C2%AEne_Tahar>
swrc:pages 185-188 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/newcas/2012>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/newcas/NarayananDZT12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/newcas/NarayananDZT12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/newcas/newcas2012.html#NarayananDZT12>
rdfs:seeAlso <https://doi.org/10.1109/NEWCAS.2012.6328987>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/newcas>
dc:title Using LCSS algorithm for circuit level verification of analog designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document