A New FPGA-Based Controller Card for the Optimisation of the Front-End Readout Electronics of Charged-Particle Veto Detector at ALICE.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/ngcas/SegunaGGCGC18
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/ngcas/SegunaGGCGC18
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Clive_Seguna
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Edward_Gatt
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Giacinto_De_Cataldo
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ivan_Grech
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jordan_Lee_Gauci
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Owen_Casha
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FNGCAS.2018.8572296
>
foaf:
homepage
<
https://doi.org/10.1109/NGCAS.2018.8572296
>
dc:
identifier
DBLP conf/ngcas/SegunaGGCGC18
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FNGCAS.2018.8572296
(xsd:string)
dcterms:
issued
2018
(xsd:gYear)
rdfs:
label
A New FPGA-Based Controller Card for the Optimisation of the Front-End Readout Electronics of Charged-Particle Veto Detector at ALICE.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Clive_Seguna
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Edward_Gatt
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Giacinto_De_Cataldo
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ivan_Grech
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jordan_Lee_Gauci
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Owen_Casha
>
swrc:
pages
45-48
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/ngcas/2018
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/ngcas/SegunaGGCGC18/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/ngcas/SegunaGGCGC18
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/ngcas/ngcas2018.html#SegunaGGCGC18
>
rdfs:
seeAlso
<
https://doi.org/10.1109/NGCAS.2018.8572296
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/ngcas
>
dc:
title
A New FPGA-Based Controller Card for the Optimisation of the Front-End Readout Electronics of Charged-Particle Veto Detector at ALICE.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document