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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/nocs/NikitinCCKO10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/%E2%88%9A%C3%BAmit_Y._Ogras>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jordi_Cortadella>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michael_Kishinevsky>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nikita_Nikitin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Satrajit_Chatterjee>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FNOCS.2010.22>
foaf:homepage <https://doi.org/10.1109/NOCS.2010.22>
dc:identifier DBLP conf/nocs/NikitinCCKO10 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FNOCS.2010.22 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/%E2%88%9A%C3%BAmit_Y._Ogras>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jordi_Cortadella>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michael_Kishinevsky>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nikita_Nikitin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Satrajit_Chatterjee>
swrc:pages 125-134 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/nocs/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/nocs/NikitinCCKO10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/nocs/NikitinCCKO10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/nocs/nocs2010.html#NikitinCCKO10>
rdfs:seeAlso <https://doi.org/10.1109/NOCS.2010.22>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/nocs>
dc:title Physical-Aware Link Allocation and Route Assignment for Chip Multiprocessing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document