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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/norcas/PfauHRHB23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_Becker_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jiro_Hernandez>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Johannes_Pfau>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Klaus_Hofmann>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Maximilian_Reuter>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FNorCAS58970.2023.10305486>
foaf:homepage <https://doi.org/10.1109/NorCAS58970.2023.10305486>
dc:identifier DBLP conf/norcas/PfauHRHB23 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FNorCAS58970.2023.10305486 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
rdfs:label Co-Simulating Region-Based Dynamic Voltage Scaling for FPGA Architecture Design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_Becker_0001>
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Johannes_Pfau>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Klaus_Hofmann>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Maximilian_Reuter>
swrc:pages 1-7 (xsd:string)
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/norcas/norcas2023.html#PfauHRHB23>
rdfs:seeAlso <https://doi.org/10.1109/NorCAS58970.2023.10305486>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/norcas>
dc:title Co-Simulating Region-Based Dynamic Voltage Scaling for FPGA Architecture Design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document