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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mikko_Hietanen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rehman_Akbar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Timo_Rahkonen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FNORCHIP.2019.8906899>
foaf:homepage <https://doi.org/10.1109/NORCHIP.2019.8906899>
dc:identifier DBLP conf/norchip/HietanenASARP19 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FNORCHIP.2019.8906899 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
rdfs:label Optimizing Inductorless Static CML Frequency Dividers up to 23GHz Output Using 45nm CMOS PD-SOI. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Timo_Rahkonen>
swrc:pages 1-4 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/NORCHIP.2019.8906899>
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dc:title Optimizing Inductorless Static CML Frequency Dividers up to 23GHz Output Using 45nm CMOS PD-SOI. (xsd:string)
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rdf:type swrc:InProceedings
rdf:type foaf:Document