Design and Implementation of 2D IDCT/IDST-Specific Accelerator on Heterogeneous Multicore Architecture.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/norchip/PourabedNN18
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Design and Implementation of 2D IDCT/IDST-Specific Accelerator on Heterogeneous Multicore Architecture.
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Design and Implementation of 2D IDCT/IDST-Specific Accelerator on Heterogeneous Multicore Architecture.
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