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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/norchip/VoernesYA14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Magne_Voernes>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Snorre_Aunet>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Trond_Ytterdal>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FNORCHIP.2014.7004746>
foaf:homepage <https://doi.org/10.1109/NORCHIP.2014.7004746>
dc:identifier DBLP conf/norchip/VoernesYA14 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FNORCHIP.2014.7004746 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
rdfs:label Performance comparison of 5 subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout. (xsd:string)
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foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Trond_Ytterdal>
swrc:pages 1-6 (xsd:string)
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rdfs:seeAlso <https://doi.org/10.1109/NORCHIP.2014.7004746>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/norchip>
dc:title Performance comparison of 5 subthreshold CMOS flip-flops under process-, voltage-, and temperature variations, based on netlists from layout. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document