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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/npc/ZhangPHHT20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ahui_Huang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Longlong_Zhang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tian_Tian>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xiao_Hu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuanxi_Peng>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-030-79478-1%5F17>
foaf:homepage <https://doi.org/10.1007/978-3-030-79478-1_17>
dc:identifier DBLP conf/npc/ZhangPHHT20 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-030-79478-1%5F17 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label FPGA-Based Multi-precision Architecture for Accelerating Large-Scale Floating-Point Matrix Computing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ahui_Huang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Longlong_Zhang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tian_Tian>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xiao_Hu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuanxi_Peng>
swrc:pages 191-202 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/npc/2020>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/npc/ZhangPHHT20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/npc/ZhangPHHT20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/npc/npc2020.html#ZhangPHHT20>
rdfs:seeAlso <https://doi.org/10.1007/978-3-030-79478-1_17>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/npc>
dc:title FPGA-Based Multi-precision Architecture for Accelerating Large-Scale Floating-Point Matrix Computing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document