Single chip 46 Gb/s DP-QPSK digital clock recovery and channel equalization performance in the presence of CD, PMD, and ultra-fast SOP rotation rates exceeding 20 krad/s. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:title	Single chip 46 Gb/s DP-QPSK digital clock recovery and channel equalization performance in the presence of CD, PMD, and ultra-fast SOP rotation rates exceeding 20 krad/s. (xsd:string)
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