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<http://dx.doi.org/doi.org%2F10.1007%2F978-3-642-17752-1>
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DBLP conf/patmos/2010
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ISBN 978-3-642-17751-4
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ISBN 978-3-642-17751-4
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2011
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Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers
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Springer
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dc:title
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Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers
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6448
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