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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/patmos/CelinskiAC04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Derek_Abbott>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peter_Celinski>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sorin_Cotofana>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-30205-6%5F92>
foaf:homepage <https://doi.org/10.1007/978-3-540-30205-6_92>
dc:identifier DBLP conf/patmos/CelinskiAC04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-30205-6%5F92 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Derek_Abbott>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peter_Celinski>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sorin_Cotofana>
swrc:pages 899-906 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/patmos/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/patmos/CelinskiAC04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/patmos/CelinskiAC04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/patmos/patmos2004.html#CelinskiAC04>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-30205-6_92>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/patmos>
dc:title Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document