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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/patmos/FuLHCTP04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jingjing_Fu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sheldon_X.-D._Tan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xianlong_Hong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yici_Cai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhu_Pan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zuying_Luo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-30205-6%5F45>
foaf:homepage <https://doi.org/10.1007/978-3-540-30205-6_45>
dc:identifier DBLP conf/patmos/FuLHCTP04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-30205-6%5F45 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Simultaneous Wire Sizing and Decoupling Capacitance Budgeting for Robust On-Chip Power Delivery. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jingjing_Fu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sheldon_X.-D._Tan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xianlong_Hong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yici_Cai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhu_Pan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zuying_Luo>
swrc:pages 433-441 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/patmos/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/patmos/FuLHCTP04/dblp>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/patmos/patmos2004.html#FuLHCTP04>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-30205-6_45>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/patmos>
dc:title Simultaneous Wire Sizing and Decoupling Capacitance Budgeting for Robust On-Chip Power Delivery. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document