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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/patmos/GiacomottoSVO08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Christophe_Giacomotto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mandeep_Singh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Milena_Vratonjic>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vojin_G._Oklobdzija>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-95948-9%5F27>
foaf:homepage <https://doi.org/10.1007/978-3-540-95948-9_27>
dc:identifier DBLP conf/patmos/GiacomottoSVO08 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-95948-9%5F27 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Christophe_Giacomotto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mandeep_Singh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Milena_Vratonjic>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vojin_G._Oklobdzija>
swrc:pages 268-276 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/patmos/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/patmos/GiacomottoSVO08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/patmos/GiacomottoSVO08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/patmos/patmos2008.html#GiacomottoSVO08>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-95948-9_27>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/patmos>
dc:subject Clocked storage elements; energy optimization; flip-flops; VLSI; power consumption; circuit tuning; circuit optimization; circuit analysis; power gating; clock gating; MTCMOS; voltage scaling (xsd:string)
dc:title Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document