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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/patmos/LinK09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chih-Hsiang_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/James_B._Kuo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-642-11802-9%5F17>
foaf:homepage <https://doi.org/10.1007/978-3-642-11802-9_17>
dc:identifier DBLP conf/patmos/LinK09 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-642-11802-9%5F17 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Design Optimization of Low-Power 90nm CMOS SOC Application Using 0.5V Bulk PMOS Dynamic-Threshold with Dual Threshold (MTCMOS): BP-DTMOS-DT Technique. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chih-Hsiang_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/James_B._Kuo>
swrc:pages 127-135 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/patmos/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/patmos/LinK09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/patmos/LinK09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/patmos/patmos2009.html#LinK09>
rdfs:seeAlso <https://doi.org/10.1007/978-3-642-11802-9_17>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/patmos>
dc:title Design Optimization of Low-Power 90nm CMOS SOC Application Using 0.5V Bulk PMOS Dynamic-Threshold with Dual Threshold (MTCMOS): BP-DTMOS-DT Technique. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document