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dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrea_Pugliese_0002>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesco_A._Amoroso>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Cocorullo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gregorio_Cappuccino>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-95948-9%5F32>
foaf:homepage <https://doi.org/10.1007/978-3-540-95948-9_32>
dc:identifier DBLP conf/patmos/PuglieseACC08 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-95948-9%5F32 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrea_Pugliese_0002>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesco_A._Amoroso>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Cocorullo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gregorio_Cappuccino>
swrc:pages 318-327 (xsd:string)
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/patmos/patmos2008.html#PuglieseACC08>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-95948-9_32>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/patmos>
dc:subject CMOS analog integrated circuits; frequency compensation; operational amplifiers; transient response (xsd:string)
dc:title Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document