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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/pdcat/SunGH20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Long_Sun>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Longkun_Guo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peihuang_Huang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-030-69244-5%5F18>
foaf:homepage <https://doi.org/10.1007/978-3-030-69244-5_18>
dc:identifier DBLP conf/pdcat/SunGH20 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-030-69244-5%5F18 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label System-Level FPGA Routing for Logic Verification with Time-Division Multiplexing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Long_Sun>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Longkun_Guo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peihuang_Huang>
swrc:pages 210-218 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/pdcat/2020>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/pdcat/SunGH20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/pdcat/SunGH20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/pdcat/pdcat2020.html#SunGH20>
rdfs:seeAlso <https://doi.org/10.1007/978-3-030-69244-5_18>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/pdcat>
dc:title System-Level FPGA Routing for Logic Verification with Time-Division Multiplexing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document