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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/pdp/ChenPK96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chung-Ta_King>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jih-Kwon_Peir>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yunn_Yen_Chen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FEMPDP.1996.500630>
foaf:homepage <https://doi.org/10.1109/EMPDP.1996.500630>
dc:identifier DBLP conf/pdp/ChenPK96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FEMPDP.1996.500630 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label Performance of Shared Cache on Multithreaded Architectures. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chung-Ta_King>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jih-Kwon_Peir>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yunn_Yen_Chen>
swrc:pages 541-548 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/pdp/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/pdp/ChenPK96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/pdp/ChenPK96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/pdp/pdp1996.html#ChenPK96>
rdfs:seeAlso <https://doi.org/10.1109/EMPDP.1996.500630>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/pdp>
dc:subject cache storage; parallel architectures; performance evaluation; shared memory systems; processor scheduling; simulation; shared cache performance; multithreaded architectures; trace-driven simulation technique; storage hierarchy system; multithreaded execution environment; multithread scheduling techniques; program traces; server/workstation workload mix; MRU priority scheduling scheme; round-robin scheduling method; direct-map cache; absolute hit ratio; concurrent threads; cache size; set associativity (xsd:string)
dc:title Performance of Shared Cache on Multithreaded Architectures. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document