An Implementation of a Fault-Tolerant 2D Systolic Array on FPGAs and Its Evaluation.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/pdpta/HoritaT09
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dcterms:
bibliographicCitation
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dc:
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2009
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An Implementation of a Fault-Tolerant 2D Systolic Array on FPGAs and Its Evaluation.
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An Implementation of a Fault-Tolerant 2D Systolic Array on FPGAs and Its Evaluation.
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