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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/pepm/GillenwaterMSZTGO08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Angela_Yun_Zhu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cherif_R._Salama>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gregory_Malecha>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jennifer_Gillenwater>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jim_Grundy>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/John_O%27Leary>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Walid_Taha>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1328408.1328416>
foaf:homepage <https://doi.org/10.1145/1328408.1328416>
dc:identifier DBLP conf/pepm/GillenwaterMSZTGO08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1328408.1328416 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Angela_Yun_Zhu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cherif_R._Salama>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gregory_Malecha>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jennifer_Gillenwater>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jim_Grundy>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/John_O%27Leary>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Walid_Taha>
swrc:pages 41-50 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/pepm/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/pepm/GillenwaterMSZTGO08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/pepm/GillenwaterMSZTGO08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/pepm/pepm2008.html#GillenwaterMSZTGO08>
rdfs:seeAlso <https://doi.org/10.1145/1328408.1328416>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/pepm>
dc:subject code generation, hardware description languages, statically typed two-level languages, synthesizability, verilog elaboration (xsd:string)
dc:title Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document